Photonics

• Lightmatter's "Passage" Photonic Interconnect Enters Pre-Production Qualification (May 2026) — Lightmatter (Cambridge, MA; CEO Nick Harris) confirmed that its Passage photonic interconnect fabric — which uses wavelength-division multiplexing (WDM) to route data between AI accelerators with sub-picojoule-per-bit energy efficiency — has entered pre-production qualification with an undisclosed hyperscaler, widely reported to be Google. Passage replaces the copper NVLink/InfiniBand backplane within a compute rack, targeting 10–100× energy reduction at the interconnect layer. Timeline: pre-production qualification underway; volume ramp targeted Q1–Q2 2027. Moat implication: Cisco's optical transceiver business and Amphenol's copper interconnect segment face structural pressure at the rack-scale layer if Passage qualifies successfully.

• Ayar Labs and TSMC Co-Packaged Optics Milestone (April 2026) — Ayar Labs (Santa Clara; CEO Charles Wuischpard) announced that its TeraPHY optical I/O chiplet — fabricated on TSMC's silicon photonics process — achieved 4 Tbps aggregate bandwidth per package in co-packaged optics (CPO) configuration, validated in collaboration with an unnamed compute ASIC partner believed to be AMD. This is a critical process milestone: TSMC's ability to integrate photonic and electronic dies in the same advanced packaging flow (CoWoS-S variant) removes a key manufacturing barrier. Timeline: chiplet sampling to select partners in Q3 2026; production-scale CoWoS integration targeted 2027–2028. Moat implication: Strengthens TSMC's position as the indispensable photonic-electronic integration foundry; challenges GlobalFoundries and Intel Foundry Services, which lack equivalent CPO packaging depth.

• Celestial AI "Photonic Fabric" Architecture Raises $250M Series C (March 2026) — Celestial AI (Santa Clara; CEO Dave Lazovsky) closed a $250M Series C, bringing total funding to ~$425M, to scale its optical fabric architecture that disaggregates memory from compute using photonic interconnects. The architecture directly addresses the "memory wall" bottleneck in large language model inference — a problem that electrical interconnects cannot solve at the bandwidth densities required by 100B+ parameter models. Investors include Samsung Ventures and Koch Disruptive Technologies, signalling foundry and industrial capital alignment. Timeline: first customer deployments targeted H1 2027. Moat implication: If validated, Celestial AI's architecture structurally undermines the HBM stacking moat held by SK Hynix and Samsung in AI memory, by replacing proximity-stacking with optical distance-independence.

• Cisco Acquires Acacia Communications Integration Reaches Full Stack (Ongoing, 2026) — Cisco (having acquired Acacia for $4.5B, completed 2021) has now fully integrated Acacia's coherent optical DSP technology into its 8000 Series routers and Silicon One ASIC platform, shipping coherent ZR+ pluggable optics at 400G/800G in volume as of Q1 2026. This represents Cisco's defensive repositioning: rather than leading all-photonic switching, Cisco is entrenching in the coherent transport layer (long-haul, metro) where it has existing customer relationships. Moat implication: Cisco is building a defensible position in coherent optical networking but is not addressing the rack-scale photonic interconnect layer where Lightmatter and Ayar Labs are competing — a strategic gap that investment teams should monitor carefully.

• DARPA PIPES Programme Advances Photonic Integrated Circuit Switching for Military Networks (Q1 2026) — DARPA's Photonics in the Package for Extreme Scalability (PIPES) programme — involving Raytheon Intelligence & Space, Lockheed Martin, and academic partners at MIT Lincoln Laboratory and UC Santa Barbara — published Phase 2 results demonstrating sub-nanosecond optical switching fabrics for military tactical network applications. The defence use case (jam-resistant, low-probability-of-intercept optical switching in contested environments) is accelerating photonic switching IP development that has direct dual-use application in commercial data centre switching fabrics. Timeline: Phase 2 results published Q1 2026; Phase 3 (system integration) expected 2027–2028. Moat implication: Raytheon and Lockheed are accumulating classified and export-controlled photonic switching IP that creates a structural barrier to entry in sovereign/defence data centre infrastructure — a segment that commercial hyperscalers cannot easily address.

• Co-Packaged Optics (CPO) Displacing Pluggable Transceivers [HIGH] — The transition from pluggable optical transceivers (currently a ~$8B annual market dominated by II-VI/Coherent, Lumentum, and InnoLight) to co-packaged optics integrated directly into switch ASICs is progressing faster than consensus expects, driven by the power wall at 51.2 Tbps switch port densities. Broadcom's Humboldt (next-generation Tomahawk/Trident successor) and Marvell's Teralynx 10 are both architected for CPO integration, with volume production targeted 2027. Disrupted incumbents: II-VI/Coherent (pluggable transceiver revenue at risk), Amphenol (copper DAC/AOC cable assemblies), Lumentum. Potential beneficiaries: Ayar Labs, Marvell (CPO-native ASIC design), TSMC (CPO packaging), and integrated photonic foundries.

  • KPIs to monitor: (1) Coherent Corp (formerly II-VI) pluggable transceiver revenue as a % of total optical revenue — watch for sequential decline beginning Q3 2026; (2) Broadcom's Humboldt tape-out confirmation date; (3) IEEE 802.3df CPO standardisation progress (next working group meeting: Q3 2026).

• All-Photonic Switching Fabric as a Viable Data Centre Architecture [MEDIUM] — Multiple research groups — notably Rockley Photonics (though financially distressed), MIT Photonics Group (Prof. Dirk Englund's lab), and corporate R&D at Microsoft Research (Silicon Valley) — have demonstrated all-optical packet switching at nanosecond timescales in controlled environments. The gap between lab demonstration and production-grade switching (deterministic latency, fault tolerance, thermal stability) remains 3–5 years for full-fabric deployment. However, hybrid architectures (optical data plane + electronic control plane) are achievable within 18 months. Disrupted incumbents: Cisco (IOS-XR switching ASIC ecosystem), Arista Networks (7800 series), Juniper/HPE. Potential beneficiaries: Lightmatter (Envise photonic AI chip), startups building optical control plane software.

  • KPIs to monitor: (1) Number of TSMC SiPh N90 tape-out customers disclosed in quarterly earnings calls; (2) Rockley Photonics restructuring outcome — asset acquisition by a strategic buyer would signal technology validation; (3) Microsoft Azure photonic switching pilot announcement (watch Azure infrastructure blog and patent filings).

• Fabless Photonic Chip Model Gaining Foundry Support [HIGH] — The emergence of a fabless photonic chip ecosystem — analogous to the ARM/TSMC model in electronics — is the most structurally significant shift in photonics in a decade. TSMC's SiPh process, GlobalFoundries' GF Fotonix platform, and imec's iSiPP50G PDK are enabling fabless photonic design houses to tape out without owning fabs. This mirrors the 1990s electronics transition and implies that the design IP layer, not the fab, will capture the majority of value. Disrupted incumbents: Vertically integrated photonic component makers (Lumentum, Coherent, II-VI) whose moats depend on proprietary fab processes. Potential beneficiaries: ARM Holdings (if photonic IP licensing models emerge analogous to CPU ISA licensing — currently speculative but worth monitoring), EDA vendors (Synopsys, Cadence, which are building photonic PDK toolchains).

  • KPIs to monitor: (1) Synopsys OptSim/PhoeniX integration into standard VLSI flows — watch for product announcements at OFC 2027; (2) Number of fabless photonic startups completing first silicon on TSMC SiPh (track via TSMC customer disclosures and startup funding announcements); (3) GlobalFoundries GF Fotonix customer win disclosures.

• Military Optical Switching as a Sovereign Technology Moat [MEDIUM] — US DoD investment in photonic switching (DARPA PIPES, AFRL photonic RF programmes, IARPA quantum photonics) is creating a classified IP base that will be export-controlled under ITAR/EAR. This creates a bifurcated photonics market: a commercial/hyperscale track and a sovereign/defence track. Companies operating in both (Raytheon, L3Harris, and potentially Lumentum via its defence optical segment) will face technology transfer restrictions that limit their ability to commercialise defence-derived photonic IP in civilian data centres. Disrupted incumbents: Chinese photonic component suppliers (HiSilicon, Eoptolink) face accelerating exclusion from US/allied data centre supply chains. Potential beneficiaries: US-domiciled photonic foundries (Sandia National Laboratories' microsystems fab, MIT Lincoln Laboratory Microelectronics Laboratory) and defence primes with dual-use photonic programmes.

  • KPIs to monitor: (1) BIS Entity List additions of Chinese photonic component manufacturers — track Federal Register; (2) DARPA PIPES Phase 3 contract awards (expected Q4 2026); (3) L3Harris photonic RF/EW programme revenue disclosures in defence segment earnings.

Strengthening Moats

• TSMC — TSMC's SiPh N90 silicon photonics process node, combined with its CoWoS advanced packaging capability, positions it as the only foundry currently capable of integrating photonic and electronic dies at production scale with sufficient yield. No other foundry — including Samsung Foundry, Intel Foundry Services, or GlobalFoundries — has demonstrated equivalent CPO packaging throughput. As fabless photonic design houses proliferate, TSMC's process becomes the chokepoint of the entire photonic compute supply chain. This moat is deepening, not plateauing, because photonic process development requires 5–8 year lead times to replicate. Investment teams monitoring TSMC's photonics revenue line (currently not separately disclosed) should watch for first explicit SiPh revenue contribution in 2027 earnings guidance.

• Ayar Labs and Lightmatter (Architectural IP) — Both companies have filed extensive patent portfolios covering optical I/O chiplet interfaces (Ayar) and photonic matrix multiplication architectures (Lightmatter's Envise). Unlike hardware moats, architectural IP moats in photonics are durable because the physical layer constraints (waveguide geometry, coupling efficiency, thermal crosstalk) are non-trivial to design around. Lightmatter's Passage interconnect, in particular, has no direct architectural equivalent from an established incumbent.

• Raytheon Intelligence & Space / Lockheed Martin (Defence Photonic Switching IP) — DARPA PIPES Phase 2 results indicate that Raytheon and Lockheed are accumulating export-controlled optical switching IP that creates a structural barrier in the sovereign infrastructure segment. This moat is reinforced by classification and ITAR controls, making it effectively non-replicable by commercial entrants.

Eroding Moats

• Amphenol — Amphenol's copper interconnect business (DAC cables, AOC assemblies, backplane connectors) generates substantial revenue from data centre infrastructure. The CPO transition directly threatens this segment: co-packaged optics eliminate the pluggable transceiver and associated copper/fibre cable assembly at the switch-to-ASIC interface. Amphenol's data communications segment (~35% of total revenue) faces a structural headwind that is likely to materialise in volume terms by 2028–2029, with early pricing pressure visible by 2027 as CPO-qualified platforms enter procurement cycles. Amphenol's partial hedge is its fibre optic connector business, but connector margins are structurally lower than cable assembly margins.

• Coherent Corp (formerly II-VI, incorporating Lumentum's transceiver business) — Coherent's pluggable transceiver revenue — 400G ZR, 800G ZR+ modules — is the most directly at-risk revenue stream in the photonics supply chain. The CPO transition does not eliminate optical components; it internalises them into the switch ASIC package, shifting value from the pluggable module vendor to the CPO chiplet vendor (Ayar Labs, Marvell's optical team). Coherent's strategic response — vertical integration into compound semiconductor (InP, GaAs) laser sources — provides a partial moat in laser supply, but the systems-level margin is under pressure. Watch Coherent's transceiver ASP (average selling price) trajectory beginning Q3 2026 as a leading indicator.

• Cisco (Switching ASIC Ecosystem) — Cisco's IOS-XR/Silicon One architecture is optimised for electronic packet switching. The company's Acacia integration provides coherent optical transport capability but does not address the rack-scale photonic interconnect layer. If Lightmatter's Passage or a comparable architecture achieves hyperscaler qualification, Cisco's switching revenue in AI data centre buildouts — currently a growth vector — faces architectural displacement within 3–5 years. Cisco's enterprise networking moat (campus, branch, security) remains intact; the erosion is specific to hyperscale AI infrastructure.

Emerging Moats

• Photonic EDA (Electronic Design Automation) Toolchain — Synopsys and Cadence are both building photonic PDK (Process Design Kit) integration into their standard VLSI toolchains. Synopsys acquired OptSim and has been integrating photonic simulation into its Fusion Compiler flow. Cadence acquired Integrand Software and has photonic layout tools in Virtuoso. The company that achieves a unified electro-photonic co-simulation and co-design flow first will capture a moat analogous to Synopsys/Cadence's dominance in electronic EDA — a high-switching-cost, recurring-licence business. This moat did not meaningfully exist 18 months ago; it is forming now as fabless photonic design houses scale their engineering teams.

• Photonic Foundry Process IP (imec, GlobalFoundries GF Fotonix) — imec's iSiPP50G and iSiPP25G PDKs, developed in Leuven (Belgium) and licensed to multiple foundries, represent an emerging IP licensing moat in photonic process design. imec's position as a neutral research consortium — with member companies including ASML, Intel, Samsung, and Qualcomm — gives it a structural role in defining process standards that individual foundries cannot easily replicate unilaterally.

1. Investigate Ayar Labs and Lightmatter's Hyperscaler Qualification Timelines